Introduction to Codesigner Job Support

Simulink and Matlab enable hardware/software Codesign by providing C/C++ & HDL code generation with targeted support for programmable Complex System-on-Chip devices. Codesign supports hardware and software is Embedded System, UML design and control & scheduling codesign etc. FPGA & ASIC designs use HDL Coder and HDL Verifier to specify & generate HDL code for implementation, explore functional behavior and continuously test & verify design through co-simulation with HDL simulators or FPGA in the loop. The use of hardware support packages, these products target development boards for Xilinx-Zynq-7000 All Programmable Complex System-on-Chip and Intel-Cyclone-V SoC devices.

Overview of  Codesigner Job Support

Many believe that hardware-software Codesign or Simply Codesign, a more synergistic approach to system design, can aid in achieving this objective.Codesign is desirable to improve the development of the complex system, particularly embedded system. Using optimizations provided with the codes, you customize generated code for your target SoC device, and for example, you can use resource sharing & distributed pipelining from HDL Coder to improve the efficiency of your FPGA implementation. The motivation for codesign of control and scheduling are illustrated. The first is the rapid growth in the design of Complex System-on-Chip devices (SOC), the second is progress in adding capabilities to the Unified Modeling Language (UML). Codesign use the FPGA I/O module to accelerate parts of real time application, it can use Simulink Real-Time & HDL Coder. It can select more than one FPGA I/O modules in the HDL Workflow Advisor. Capability helps to design real-time applications that can run on both the Speed-goat real-time target computer & the plugged-in FPGA I/O modules.

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